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How eMMC 5.0 can improve your organization's small storage needs

The latest eMMC specification puts the tiny flash storage devices on a level playing field with many SSDs when it comes to speed -- but eMMC is still the smallest flash drive.

The industry standard that defines how embedded flash memory chips work in tablets and smartphones has reached an interesting point with eMMC 5.0. Revisions to the embedded MultiMediaCard standard have lifted performance into the range of many 2.5-inch solid-state drives, creating very versatile product families with excellent response times for users. This confirms the value in using this flash class in its existing markets while opening up opportunities in the internet of things market.

The value of the eMMC interface is its ease of integration. The basic interface is a parallel data bus, much as early hard drives used Parallel ATA (PATA) interfaces (remember those wide ribbon cables?) This type of interface can be connected to a processor with a very simple electronics setup, which saves space and costs. Electrically, such a parallel interface is a good fit for connecting a simple CPU chip to its flash, which might only be an inch away on the circuit board.

EMMC is an 8-bit parallel-connected interface. It operates in half-duplex mode, which means the 8 bits of connection can be used to send or receive data, but not simultaneously. As with all parallel interfaces, there is a clock strobe that executes the transfer of the 8 bits on the bus. The speed of this clock has increased dramatically from the 52 MHz of the 4.41 version of the specification, with the result that the maximum sustained transfer rate of eMMC devices using the 5.0 standard is 2.5 times faster, delivering a sequential read performance of 250 MBps. Two bits of data are transferred on each clock, strobed by the front and back edge of the clock pulses.

Sequential bandwidth makes a huge difference as to the quality of video playback, as well as the time to load applications, and eMMC 5.0 should deliver a better user experience as a result of the speed boost. An update of that revision is coming into the market as version 5.1, which boosts sequential write performance into the 90 MBps range. That extra speed improves copy operations.

Random access is also enhanced under eMMC 5.0, achieving almost double the performance of eMMC 4.41 on reading, but boosting write operations six-fold. This boosts small write operations, which include file system updates and writing web page content. If the operating system supports multitasking, this will speed up paging to flash.

The value of the eMMC interface is its ease of integration.

The rest of the interface is simple, with a CMD (command line) and a data strobe line used as a reverse-direction clock in high-speed transfer mode and, finally, a RESET line.

Data addressing has been modified in eMMC 5.0 devices to use a 512 byte sector rather than byte addresses. This allows the addressable memory to expand to cover capacities of 512 GB, the largest currently available, and beyond.

eMMC 5.0 expands into other connections

Over time, the infrastructure around eMMC has expanded to include chips that connect eMMC chips to a variety of other interfaces. Popular offerings include a Serial ATA to eMMC chip, PCI Express (PCIe) adapter chips and even PCIe cards that can hold eMMC memory chips and be plugged into a server or miniature computer.

Sage Microelectronique even suggested building a small RAID array for such devices using eMMC parts as drives. Technology caught up with this idea, unfortunately, and miniature SSDs have been released with even smaller footprints than the eight eMMC drives involved in Sage's experiment, but eMMCs act as the solid-state storage in budget notebooks. The industry also uses the devices in hybrid disk drives, which have a small amount of flash memory to act as a speed-up cache for the spinning disk.

eMMC chips are increasing in data storage capacity. There are 512 GB chips available, and the relentless march of 3D NAND technology will take that to at least 1 terabyte. However, one issue with eMMC is on the horizon: Universal Flash Storage. This standard mirrors the transition from a PATA interface to SATA in disk drives. It has two differential signals, just like SATA, so it runs much faster than eMMC. It also abides by the SCSI command structure used by SATA. Effectively, eMMC will be absorbed into the mainstream of storage, but there will still be a class of tiny embedded flash memory devices with lots of uses.

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