Samsung has begun mass production on its highest bit density triple-level cell NAND, which will lead to increased capacity of drives, an uptick in performance speeds and lower costs for the vendor.
Since teasing the chip at Flash Memory Summit 2022 and Memory Tech Day 2022, Samsung is now producing its eighth-generation vertical NAND, Samsung's version of 3D NAND. The latest is a triple-level cell flash chip with 1 terabit of density. The company stated that its newest generation increases the speed of data transfer by 1.2 times to 2.4 Gbps.
When major vendors bring next-generation products to market, there is a focus on cost savings and better performance, and this is no different, according to Jeff Janukowicz, research vice president at IDC.
"In the enterprise market, we see a demand for higher-density products, especially for storage applications," Janukowicz said. "And higher density tends to mean lower costs as well."
Jeff JanukowiczResearch vice president, IDC
This new NAND isn't aimed solely at making high-capacity drives, he said. But having denser NAND on smaller-capacity drives saves on costs for Samsung.
Samsung -- the largest NAND supplier, with about 40% of the market share, according to IDC research -- achieved the bit density through advancements to bit productivity in each wafer, but provided few additional details.
The lack of insight makes it difficult to quantify how Samsung's new generation of NAND performs against competitive offerings such as Micron's 200-plus layer NAND, according to Jim Handy, general director and semiconductor analyst at Objective Analysis.
What is clear is that increased density brings the biggest gains for the vendor, he said.
"The benefit to any flash manufacturer of getting to the next stage of development with their NAND is to drive their costs down," Handy said.
While the increased density and lower costs might not directly benefit customers, the increase in speed will, Handy said.
Performance lying in wait
Samsung's newest generation of vertical NAND (V-NAND) uses the Toggle double data rate (DDR) 5.0 interface standard. The Toggle standard was co-created by Samsung and Toshiba (now Kioxia), and the DDR 5.0 interface standard speeds up data transfer rates, which enabled Samsung to increase V-NAND performance over its predecessor.
"The [Toggle DDR 5.0 interface] is blazing fast," Handy said. "If anyone wished for faster NAND, it is here now."
The latest version of Toggle brings the data transfer rate to 2,400 Mbps per pin, or 4,800 GB/s for a 16-pin device. The performance is fast out of the NAND chip, but gets slowed going from the chip to the controller and then through the interface to the host, he said.
Still, the increase in chip performance will benefit SSD performance. While any NAND can work for the faster upcoming PCIe 5.0 SSD interface, faster NAND will result in faster overall drive performance, Handy said.
"Every NAND generation sees a change in cell structure that can result in performance gains," IDC's Janukowicz said.
Potential on emerging form factors
Improved speed for upcoming interfaces isn't the only potential benefit of the new chip. The density per wafer plays into another emerging trend of moving away from traditional form factors to Enterprise and Data Center Standard Form Factor (EDSFF), Janukowicz said. Some form factors have limited space for NAND packages.
"Whether long or short, we are seeing a movement up to higher capacities, particularly on the [E.1L form factor]," he said, referring to long form or ruler SSD.
Having a higher capacity by adding more NAND also creates more heat, Handy said. EDSFF drives have better thermal regulation, making them a better choice for higher capacities.
Adam Armstrong is a TechTarget Editorial news writer covering file and block storage hardware and private clouds. He previously worked at StorageReview.com.