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Scaling of New Memory Technologies Used for Persistent Memory

New memory technologies are gaining wide interest as persistent memory in storage systems. Here, you will find a review of different memory in the market and their characteristics, scaling challenges and more.

00:00 Mahendra Pakala: Good afternoon, my name is my Mahendra Pakala. I'm from Applied Materials. I'll be talking about scaling of new persistent memory. For introduction, I'll cover, briefly, the status of different memory in market and also their characteristics. Then I'll jump into various scaling challenges in terms of materials and process for MRAM as well as 3D XPoint based on PC RAM.

So, there are many new approaches for the persistent memory that you can find in literature. Here, I'll try to show what technology are in manufacturing and sampling stage versus the ones that are in the R&D stage. On the right-most column, we have the PC RAM-based XPoint, and that is in the highest density at 128 gigabits per chip. On the left-most column is MRAM with modest densities of 2 gigabits, that's also in production for some time now. In terms of wafer fab equipment used to process this materials, PVD, or Physical Vapor Deposition two, is the deposition method of choice. For etch process, both reactive ion etching, or RIE, and ion beam etching, or IBE, are in the running.

01:28 MP: These are the areas that Applied Materials has products that enable high-volume manufacturing. Rest of the talk, I'll focus primarily on MRAM and phase-change memory. On this slide, I plotted the characteristics of XPoint, aka 3D XPoint, and MRAM relative to other commercial or conventional memories. In the three-axis plot, there the density along one axis and performance in terms of access time and along the second axis and endurance on the third axis. I have not plotted the energy, but roughly the non-volatile of persistent memory have higher active power but lower leakage compared to volatile memory. The yellow sun represents the universal memory, which has the best properties and these three metrics, which is still a dream. Start with the 3D NAND, which has the highest density relative to other memories, but the performance and endurance are relatively lower, so that comes on the bottom corner.

02:39 MP: With 3D XPoint, you gain performance and endurance with respect to 3D NAND. This nicely fits in the storage hierarchy above the 3D NAND layer and it's what is commonly called persistent memory. At diagonally opposite corner, we have SRAM, which is volatile and more of a working memory, but it is informative to compare along with DRAM and 3D NAND group because that comprises the other extreme of this tube. Both DRAM and SRAM have unlimited endurance, with DRAM sacrificing performance for density. Then, if you add in STT-MRAM, it shows up closer to that corner with density less than 3D XPoint was it better performance and endurance expected. So, they do have different application space based on their characteristics.

03:40 MP: Now, I'll jump into the fabrication part and scaling challenges for MRAM. MRAM cell is typically one transistor and one resistor, that's 1T1R. So, you can use standard transistor from . . . and build up to M4 and M5 level at which point the MTJ or the R part comes in and that's we fabricated at Applied Materials' fab. In particular, looking at the materials and processes to reduce switching current and improve MgO dielectric breakdown, and also to look at the impact of the etch and encapsulation process that gives low damage and redeposition. But the magnetic tunnel junction, the deposition of films, including the MgO layer, is done on our Endura Clover MRAM PVD System. The system can deposit to more than 10 materials and to form magnetic tunnel junction stacks that are more than 20 layers. This is done with atomic-level thickness control and with onboard metrology to control and monitor the process. Using this Endura system, we look at optimizing the process to improve MgO breakdown voltage.

05:00 MP: One key device parameter is RA, or resistance area product, which exponentially depends on the thickness of the MgO layer. To scale the device voltage, the RA has to be reduced and this is typically done by reducing effective thickness of MgO layer in the stand and that typically reduces the breakdown voltage since now you have a thinner MgO film. The current products are in the range of RA five to 10, and that's about 10 angstrom of MgO layer thickness. We have optimized the barrier process, so we can get higher breakdown voltage of about 100 or 1,300 millivolts, even at the thinner MgO layer, needed to get to the lower RA. This improvement in breakdown is also estimated to improve endurance by about two orders.

05:58 MP: For MRAM, the pitch or cell-side scaling is another aspect of development. Usually, it is a trilemma, you have to optimize between reducing the redeposition of material on the side wall, reducing the chemical damage and third, we need to improve the pillar profile. Our internal result shown here shows that we can get practically redep free and undamaged bits for pitches of 130 nanometer and above. Current development effort is focusing on improving yield at cell 100 nanometer pitch needed to scale to N plus two generations.

06:45 MP: Beyond MRAM, which is the current embodiment of MRAM, which is STT-MRAM, there are additional exciting devices in the broad family of MRAM, including SOT-MRAM and voltage control MRAM. These enable continuous scaling of voltage and in terms of energy, and also performance. Our current STT-MRAM feasibility to reduce the current to less than 10 microamp has been demonstrated with our industrial partner. SOT-MRAM has the advantage of decoupling the endurance and the write performance. By using separate write path, we can achieve less than 5 nanosecond axis without compromising endurance. Beyond that, there is the voltage-controlled MRAM. The advantage of this device is that the energy we obtain, the energy we need to switch, is the lowest among all the three varieties. This is due to the fact that the CMA devices are switched by voltage, rather than current that's used to switch for STT-MRAM or for SOT-MRAM. There probably are a lot of materials and integration challenges for these two new memory and MRAM family, and these are listed below in the bottom row.

08:32 MP: Next, I'll talk about phase-change memory as used as a XPoint architecture. Similar to MRAM, there are material challenges in terms of reducing programming current and reducing damage to cell while patterning using etch. The phase-change memory is deposited using Applied Materials' Endura Impulse PVD System. Again, we can deposit full stack under vacuum with tight composition control, and then the onboard metrology is also enabled on the system to control the film thickness. Phase-change memory is usually a chalcogenide with multi elements, so getting the composition right on the films is tricky.

However, there are some disadvantages for the phase-change memory that we need to improve, further improve on. The conventional phase-change memory is based on bulk materials, which transforms from crystalline phase to amorphous phase and then back again. The physics of crystallization dictates a longer time for crystallization than amorphousization, and also, one ends up with a slow set time and high current for reset. To improve performance and symmetric nature, interface phase-change memory are in development stage. Here, the transformation, or phase-change, happens only at the interface. And because faster transformation happens at the interface, we can get significantly faster performance at lower currents. This is still in CNF stage, and we are optimizing Endura System to get the right interface structures.

10:29 MP: The other part of the XPoint cell is a selector, which is also another complex chalcogenide. The Endura system is also used to deposit this layer, as shown in the picture on the left. One of the key characteristics of this film is to have a low off current, so that the overall parasitic current can be reduced in the array. This off current depends not only on the composition of the OTS layer, but also their deposition condition. As shown in the table on the right, we can use our internal texture to optimize the deposition condition to get to low off current for the selector. In terms of controlling the thickness of the films for the various new memory, Applied Materials has introduced the onboard metrology system that I alluded to in the previous slides. This slide shows some details of the OBM system called TruFilm OBM. It is integrated into Endura system and is capable of . . . resolution to determine film thickness. Besides the material in the cell itself, the metalization is another area that needs to scale.

11:53 MP: In this slide, we show one of the areas that Applied Materials is developing solution for, which is the load-resistant metalization scheme for bit line and word line. For the current products, you can see that as you go across the word line, the cell at the beginning of the word line sees a different max current than the cell at the end of the word line due to the IR drop. So, we are looking at additional load-resistant material to reduce this drop. Also, as a dimension scales, doing gap fill between the metal line becomes challenging using conventional dielectric field. Applied Materials has developed newer flowable dielectrics at low temperature that can not only fill the gaps between word line and bit line but is also compatible with a subsequent CMP process. This gets to my final slide.

The message I want to leave the audience with is that there is a development happening to enable scaling, for the next two to three generation for these two new technologies and Applied Materials is providing solutions to make this scaling happen. Thank you. And thanks for your attention.

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